Scrambling Process in 10Broad36
Scrambling Process in 10Broad36
- Synchronization
- Take into account the IEEE 802.3 frame format
- The frame encoding rules are as follows:
- Up to 5 bits of the incoming (from the AUI) data stream may be dropped for detection and Manchester decoding purposes.
- Beginning with a zero, 20 bits of zero-one pattern shall be sent unscrambled to permit receiver synchronization and clock recovery.
- The next two bits (zero-one) in the incoming pattern are set to zero (Unscrambled Mode Delimiter, UMD).
- All of the remaining bits in the preamble, the SFD, and the other frame fields are scrambled.
- An unscrambled postamble consisting of a zero followed by 22 ones follows the end of the frame.
- The scrambled data (signal) is modulated onto an analog carrier using Differential Phase Shift Keying (DPSK).
Notes: