Syllabus for Computer Architecture (CSC 3050)

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Instructor :  Yeh-Ching Chung

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Office :  Research A Building Room 403 (RA-403)

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Phone Numbers : 0755-23519576 (Office), 185-7673-9791 (Mobile)

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Class Hours : Tuesday 15:00-16:20, Wednesday 15:00-16:20

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Office Hours :  Tuesday 10:00-11:00,  Wednesday 10:00 - 11:00

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WeChat Group :   CSC3050 2019-20 Term2

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Goals :

             1. Understand the principles of Computer Architecture and their implementation details.

             2. Use hardware description language to design a simplified MIPS CPU.

             3. Use software to design an assembler and a simulator of MIPS CPU.

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Textbook :

1.      Computer Organization and Design: The Hardware/Software Interface (5th Edition), 2014 (PDF)

         David Patterson and John Hennessy

Reference :

1.     Documentations (MIPS ISA, Carry-Lookahead-Adder, IEEE-754-1985)

2.     Introduction to Computing Systems: From Bits & Gates to C & Beyond (2nd Edition), McGraw-Hill © 2004

                    Yale N. Patt and Sanjay J. Patel

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Contents :

-        Introduction (slide-0, slide-1)

-        Digital Logic Review (slide-2)

-        Instruction Set Architecture (slide-3)

-        Arithmetic and Logic Unit (slide-4)

-        Datapath (slide-5)

-        Pipelining (slide-6)

-        Memory and Cache (slide-7)

-        Virtual-Memory (slide-8)

-        Input/Output Systems (slide-9)

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Grading :

    Class participation  - 5%

    Programs - 70%

-        Design a MIPS assembler (Feb. 11, HW#1, Due Feb. 24, 23:59))

-        Design a MIPS Simulator (Feb. 25, HW#2, Due March 16, 23:59)

-        Design a simplified ALU of MIPS using Hardware Description Language (HDL) (March 17, HW#3, Due April 6, 23:59)

-        Design a simplified pipelined MIPS microprocessor using Hardware Description Language (HDL) (April 7, HW#4, Due April 27, 23:59)

    Final - 25%

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TA:   Mickey Ma (马a): mickeyma@cuhk.edu.cn

          Kefan Shuai (帅JZ): 218019066@link.cuhk.edu.cn

       

 

Last modified: 2020/01/08 09:43:58