Syllabus for Computer Architecture (CSC 3050)

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Instructor :Yeh-Ching Chung

Office : Research A Building Room 403 (RA-403)

Phone. 0755-23519576 (Office)

            185-7673-9791 (Mobile)

Class Hours: Monday 11:00-12:20, Thursday 11:00-12:20

Office Hours: Monday 9:00-10:00

                       Thursday 9:00 - 10:00

WeChat Group :  CSC3050_Spring_2019

Goals : Understand the principles of Computer Architecture and their implementation details

Textbook :

1.      Computer Organization and Design: The Hardware/Software Interface (5th Edition), 2014 (PDF)

         David Patterson and John Hennessy

Reference:

1.     Documentations

2.     Introduction to Computing Systems: From Bits & Gates to C & Beyond (2nd Edition), McGraw-Hill © 2004

                       Yale N. Patt and Sanjay J. Patel

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Contents:

-        Introduction (slide-1)

-        Digital Logic Review (slide-2)

-        Instruction Set Architecture (slide-3)

-        Arithmetic and Logic Unit (slide-4)

-        Datapath (slide-5)

-        Pipelining (slide-6)

-        Memory and Cache (slide-7)

-        Virtual-Memory (slide-8)

-        Input/Output Systems (slide-9)

-        Instruction-Level Parallelism (slide-10)

-        Multi-Threading and Multicore (slide-11)

Grading: 

    Class participation  - 5%

    Programs - 65%

-        Design a MIPS assembler (Due March 7, 23:59))

-        Design a MIPS Simulator (Due March 21, 23:59)

-        Design a 64-bit math co-processor using Hardware Description Language (HDL) or System C (Due April 11, 23:59)

-        Design a pipelined microprocessor using Hardware Description Language (HDL) or System C (Due May 2, 23:59)

    Final - 30%

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TA:  Kefan Shuai (帅JZ): 218019066@link.cuhk.edu.cn

        Rulan Wang (Lp蓝): wangrulan@cuhk.edu.cn

 

Last modified: 2019/01/15 09:37:30