Shih-Chieh Chang

±i¥@ªN

 Professor of Dept. of Computer Science,

 National Tsing Hua University Hsin-Chu, Taiwan.  

 Tel: 03-5742964, FAX : 3-5723694

 Office Tai-Da 619   Email: scchang@cs.nthu.edu.tw

 

DSC_3312

Academic Honors & Activities

Publication

Biography

VLSI/CAD laboratory

Student Recruiting

 

Education:

¡C Ph.D.:       University of California at Santa Barbara (1994).

¡C  B.S.:         Electrical Engineering, National Taiwan University (1987). 

Experience:

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Ø   202204-now ¥xÆW¥ú¹qº[¤Æ¦Xª«¥b¾ÉÅé²£·~¨ó·|(TOSIA) ¯µ®Ñªø

Ø   202204-now ¥xÆWÅã¥Ü¾¹²£·~Áp¦XÁ`·|(TDUA) ²z¨Æ

Ø   202204-now ¥xÆWÅã¥Ü¾¹º[À³¥Î²£·~¨ó·|(TPSA) ²z¨Æ

Ø   202204-now ¥xÆW¥­­±Åã¥Ü¾¹§÷®Æ»P¤¸¥ó²£·~¨ó·|(TDMDA) ²z¨Æ

Ø   202204-now ¹q¤O¹q¤l¨t²Î¬ãµoÁp·ù(PESC) ·|ªø

Ø   202204-now ²§½è¾ã¦XÁp·ù(HI-CHIP) ·|ªø

Ø   202204-now ¤u¬ã°|¹q¤l»P¥ú¹q¨t²Î¬ã¨s©Ò ©Òªø

Ø   2021-now   ¥xÆW¥b¾ÉÅé²£·~¨ó·|(TSIA)  IC³]­p©e­û·| ¥D©e

Ø   2019-now   ¥xÆW¤H¤u´¼¼zÁp·ù(AITA) °Æ·|ªø

Ø   2017-now   ¥xÆW¥b¾ÉÅé²£·~¨ó·|(TSIA) ¼úÀy©e­û·|¾Ç¬ÉÁ`·F¨Æ

Ø   2017-now   ¥xÆW¥b¾ÉÅé²£·~¨ó·|(TSIA) ²£¾Ç©e­û·|©e­û

Ø   2018-2022   ²MµØ¤j¾Ç¤H¤u´¼¼z¬ãµo(AI)¤¤¤ß¥D¥ô

Ø   2016-2022    ²MµØ¤j¾Ç¹q¸£»P³q°T¬ì§Þ¬ãµo¤¤¤ß¥D¥ô

Ø   2020-2022   ITRI ¹q¥ú©Ò  §Þ³Nªø

Ø   2021-2022   ²MµØ¤j¾Ç¥b¾ÉÅé¾Ç°|°Æ°|ªø

Ø   2015-2017   ¬ì§Þ³¡·L¹q¤l¾Ç­Ì¥l¶°¤H

Ø   2012-2017   IEEE Transaction VLSI AE

Ø   2014-2017   IEEE Transaction on CAD AE

Ø   2009-2012   ACM Transaction TODAES AE

Ø   2016-2018   IEEE ICCAD and IEEE ASPDAC Executive Committee 

Ø   2018-2020   ITRI ¹q¥ú©Ò°Æ©Òªø

Ø   2017-2018   ²MµØ¤j¾Ç°Æ¬ãµoªø

Ø   2013-2015   ²MµØ¤j¾Ç¸ê¤u¨t¨t¥D¥ô  

Ø   2011-2015   ´¼¼z¹q¤l°ê®a«¬­p¹º°õ¦æªø

Ø   2008-2010   IEEE Taipei Section CAS chapter Chair

Ø   2004-2007   ²MµØ¤j¾Ç¿nÅé¹q¸ô³]­p§Þ³N¤¤¤ß(DTC) ¥D¥ô

Ø   2013-2015   ¥xÆW¿nÅé¹q¸ô³]­p¾Ç·|(TICD)²Ä¤»©¡²z¨Æªø

Ø   2018-2020   ¤u¬ã°|¹q¤l»P¥ú¹q¨t²Î¬ã¨s©Ò °Æ©Òªø

Ø   2016-2018   ´¼¼z¹q¤l¾ô±µ¬ì§Þ­pµe °õ¦æªø

Ø   2018        ¬ì§Þ³¡®g¤ë­pµe³W¹º  Á`¥l¶°¤H

Ø   2015        ¬ì§Þ³¡¤uµ{¥q´¼¼z¹q¤l°ê®a«¬¬ì§Þ­p¹º«e¤¾Ç³N­pµe ¥l¶°¤H

Ø   2015,2020,2021 °ê¥ß¤¤¤s¤j¾Ç¸ê¤u¨t¨t©ÒµûŲ©e­û

Ø   2021        °ê¥ß¤¤¿³¤j¾Ç¸ê¤u¨t¨t©ÒµûŲ©e­û

Ø   2012-2014   ¸gÀÙ³¡§Þ³N¼f¬d©e­û·|(§Þ¼f·|)©e­û

Ø   2012-2015   °ê¬ã°|°ê®a´¹¤ù¨t²Î³]­p¤¤¤ß(CIC) ¿Ôij©e­û

Ø   2012        ACM TODAES Best Paper Award Committee Chair

Ø   2010        Council of EDA publication committee

Ø   2009        ISOCC vice conference chair

Ø   2009-2015   ²MµØ¤j¾Ç»P¤u¬ã°|¾Ç¬ã¦X§@­«¤j­pµe ¥D«ù¤H

Ø   2008-2010   IEEE Taipei Section CAS chapter Chair

Ø   2003-2005   IEEE Taipei Section °õ¦æ¯µ®Ñ

Ø   2010-2011   ±Ð¨|³¡ SOC Á`聯·ù¥l¶°¤H

Ø   2006        ±Ð¨|³¡QHR¡AEDA Áp·ù¥D®u

Ø   2006        VLSI/CAD conference general chair

Ø   ICCAD, DAC, ASPDAC, TAU, VLSI/DAT ISSOCC  Program Committee session organizer and session chair

Research Interests:

¡C   Deep Learning

£»       Robust neural network against noise and variation

£»       Deep learning model and system design for voice recognition

£»       Natural language modeling

¡C   Deep Learning Design and architecture

£»       Low Power Estimation of Deep Learning

£»       Low Power Architecture of Deep Learning

£»       AI Failure analysis, Recommendation system, architecture search

¡C   VLSI design and Design automation

£»       Aging, Noise, thermal analysis

£»       Power gating design for leakage power minimization

£»       Delay variation tolerance design and design automation

¡C    

¡C   Digital Twin and Robotic hardware and software design

£»       Digital Twin for semiconductors

£»       Robot arm sim to real and real to sim.

£»       Robot arm hardware in the loop

 

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