文字方塊: Ching-Te Chiu, Associate Professor 邱瀞德 副教授 Room: EECS 6311 Tel: +886-3-573-1208 Fax: +886-3-572-3694 Email: ctchiu@cs.nthu.edu.tw Address: Department of Computer Science National Tsing Hua University Hsinchu, Taiwan, 300 Education • Ph.D. (Electrical Engineering), University of Maryland, College Park, 1992. • M.S. (Electrical Engineering), National Taiwan University, 1988. • B.S. (Electrical Engineering), National Taiwan University, 1986. Work Experiences • National Tsing Hua University: Associate Professor of Department of Computer Science, 2004- • Agere Systems Inc.: Member of Technical Staff of High Speed Network Department, 2000-2003. • Lucent Technologies.: Member of Technical Staff of Microelectronics Division, 1996-2000. • AT&T.: Member of Technical Staff of Multimedia Department, 1994-1996. • National Chung Cheng University: Associate Professor of Department of Electrical Engineering, 1993-1994. Research interests • Multimedia System-on-Chip (SOC) Design High dynamic range image/video processing Tone mapping Image enhancement IC Video decoder design • Multi-Core System-on-Chip (SOC) platform On-Chip Communication (Network-on-Chip) Architecuture Software/Hardware codesign • High Speed Network design Interface IC design SerDes Gigabit IP Traffic Management SONET/SDH Mapper/Framer Awards • 2008 Honorable mention prize award, the Golden Silicon Award (Design group), “A 40Gbps 4-port STDM Switch IC Switching Directly on High-speed Domain.” . • 2008 Honorable mention prize award, the Golden Silicon Award (System group), “A Real-Time Display System for Generating High-Contrast, Low-Noise Virtual High Dynamic Range Images from Low Dynamic Range Images.” • 2007 Gold Prize, 2nd ARM-Code ORAMA Hardware Competition. • 2007 Design Contest paper award, the 12th Asia and South Pacific Design Automation, “A 20Gbps scalable load • 2007 Bronze Prize, 2nd TSMC Outstanding Student Research Award “A low power reconfigurable • 2006 1st prize award, the best advisor award, and the best innovation award, the Golden Silicon Award. “A 20Gbps scalable load-balanced TDM switch with CODEC for high speed networking applications.” • 2006 the Best Design Award of Digital Design, National Chip Implement Center (CIC), 2006. • 2006 Honorable Mention, SiP Contest “10Gb/s Wide-Band CML I/O buffer for High Speed Network Applications.” • 2006Honorable Mention, Phoenix IC Design Contest, “Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC.” Professional Activities • Technical Committee member, ISCAS, Nanoelectronics and Gigascale Systems, 2008~. • Technical Committee Member, IEEE Signal Processing, DISPS, 2008~ • Technical Program Committee, 17th VLSI Design/CAD Symposium, Hua-Lien, Taiwan, 2007~2008 • Section Chair: IC Implementation Annual Workshop Chip Implementation Center, 2007. • Program Committee, 16th VLSI Design/CAD Symposium, Hua-Lien, Taiwan, 2006. • Industrial and University Joint Project, Industrial Technology Research Institute (ITRI), Taiwan, 2006. • Industrial and University Joint Project, Taiwan Semiconductor Manufacture Company (TSMC), Taiwan, 2005. • IEEE member. Courses Projects Publications Labs